Sl.No.	Examination Passed	Name of the University/Board	Year of Passing/ awarded	Subject/ Specialization
1)	M.E	University Department , Anna University of Technology, Coimbatore.	(2009 - 2011)	ELECTRONICS AND COMMUNICATION ENGG
2)	B.E	Bharath Niketan Engineering College, Anna University Chennai	(2005 - 2009)	ELECTRONICS AND COMMUNICATION ENGG

 

 

 

 

 

 

 

 

 

 

 

Post held	Period of Service		Name & Address of Employer
	From	To
Teaching Fellow	August-2015	Till date	Department of Electronics Engineering, Madras Institute of Technology, Anna University, Chennai
Teaching Fellow	4 Years		Anna University Regional Centre, Coimbatore

 

2. Vignesh O, "A BUILT-IN SELF REAIR ANALYER FOR WORD-ORIENTED MEMORIES", GLOBAL JOURNAL OF ENGINEERING SCIENCE AND RESEARCHES, published by GJESR. Vol. 2, Issue 5, pp. 150-156 (2015).

1. Vignesh O, "FPGA IMPLEMENTATION OF HARDWARE EFFICIENT SEQUENTIAL DECIMAL FIXED POINT MULTIPLER", GLOBAL JOURNAL OF ENGINEERING SCIENCE AND RESEARCHES, published by GJESR. Vol. 2, Issue 5, pp. 139-148 (2015).

5. Vignesh O, K.N.Vijeyakumar, "Design of 1-bit 14T Full Subtractor in 65nm technology" presented in a National level conference on 3rd National Conference on Signal Processing, Communication and VLSI Design, organised by Anna University of Technology, Coimbatore, India from 06-May-2016 to 07-May-2011.

4. "FPGA Implementation of Optimized Parallel Prefix Adder" presented in a International level conference on 3rd International Conference on Competency Building Strategies Business and Technology for Sustainable Development, organised by Sri Ganesh School of Business Management , Salem, India from 25-Feb-2014.

3. Vignesh O, V.S. Nishok, "Hardware Efficient Low Power Booth Multiplier for Signal Processing Applications" presented in a National level conference on 2nd National Conference on Intelligent Computing in Communication & Automation , organised by Kalasalingam University, India from 08-Apr-2011.

2. Vignesh O, C. Chrisjin Gnana Suji, "Low Power CMOS Charge-Sensitive Amplifier for Radiation Detection" presented in a National level conference on National Conference on Signal processing, Electronics, Communication trends in recent Advancement , organised by Bharath Niketan Engineering College, India from 19-Mar-2011.

1. "Performance and Analysis of FPGA Lifetime" presented in a National level conference on National Level Conference on Recent Trends in Communication Techniques, organised by Noorul Islam University, India from 17-Mar-2010. 

       1.“FPGA Implementation of Optimized Parallel Prefix Adder” 3^rd International Conference on Competency Building Strategies Business and Technology for Sustainable Development. 25^th Feb-2014.

  4.“Design of 1-bit 14T Full Subtractor in 65nm technology” 3rd  National Conference   on Signal Processing, Communication and VLSI Design.  6th & 7th May-2011.

  3. “Hardware Efficient Low Power Booth Multiplier for Signal Processing Applications” 2nd  National  Conference   on Intelligent Computing in Communication & Automation 8th April-2011

  2. "Low Power CMOS Charge-Sensitive Amplifier for Radiation Detection” National Conference on Signal processing, Electronics, Communication trends in recent Advancement 19th March-2011

  1. “Performance and Analysis of FPGA Lifetime” National Level Conference on Recent Trends in Communication Techniques 17th  March-2010.

6. Participated in a National level workshop on "IC System Design" organized by Karunya University, India from 24-Feb-2012 to 25-Feb-2012.

5. Participated in a International level workshop on "Design optimization using Xilinx Plan ahead & Partial Reconfiguration" organized by Oxford Engineering College , India from 16-Dec-2011 to 17-Dec-2011.

4. Attended a National level Short Course on "VLSI Design" organized by Jansons Institute of Technology, India from 05-Dec-2011 to 17-Dec-2011.

3. Attended a National level Short Course on "Design of Analog Integrated Circuit using Cadence" organized by PSG college of technology, India from 26-Mar-2011 to 27-Mar-2011.

2. Participated in a National level workshop on "Synopsys-VLSI Design Tool" organized by Kongu Engineering College , India from 17-Feb-2011 to 19-Feb-2011.

1. Attended a National level Short Course on "IC Layout Design" organized by VIT Universi, India from 24-Jan-2011 to 27-Jan-2011.

 

1. Delivered a Lecture on "IP Based VLSI Design" in GUEST LECTURE organized by Sasurie College of Engineering , Tirupu (20-Sep-2014).